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AU5108E(P)32-533

Description

 

  • 240pin DDR2 Synchronous

    Un-buffered

  • 512MB FBGA DRAM 64Mx8-bit with

    8pcs

  • Memory Clock, Speed 3.75ns

    (533MHz)

  • 6 Layers PCB

  • CL= 4-4-4-12

  • SSTL 1.8V (+/-0.1V)

Function

Described

SPD

Function Support

Number of physical ranks on this DDR2 SDRAM

module

60 1 rank
Module Data Width 40 64bits
DDR2 SDRAM cycle time at Max. Supported CAS

latency=X

3D 3.75ns
DDR2 SDRAM Access time from clock at CL=X 50 +/-0.5ns
Refresh Rate/Type 02 7.8us
Primary DDRII SDRAM width 08 x8
Burst Lengths Supported 0C 4,8
CAS# Latencies Supported 38 5,4,3
DDR2 SDRAM cycle time at CL= X-1 3D 3.75ns
DDR2 SDRAM access time from clock at CL= X-1 50 +/-0.5ns
DDR2 SDRAM cycle time at CL= X-2 50 5.0ns
DDR2 SDRAM access time from clock at CL= X-2 60 +/-0.60ns
DDR SDRAM Device Minimum Row Precharge Time

tRP

3C 15ns
DDR SDRAM Device Minimum Row Active to Row

Active tRRD

1E 7.5ns
DDR SDRAM Device Minimum RAS# to CAS# Delay

tRCD

3C 15ns
DDR SDRAM Device Minimum RAS# Pulse Width

tRAS

28 40ns
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